nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A Fault Tolerant Approach for FPGA Embedded Processors Based on Runtime Partial Reconfiguration
|
Vavousis, Alexandros |
|
2013 |
29 |
6 |
p. 805-823 |
artikel |
2 |
Autonomous Fault-Tolerant Systems onto SRAM-based FPGA Platforms
|
Bolchini, Cristiana |
|
2013 |
29 |
6 |
p. 779-793 |
artikel |
3 |
Editorial
|
Agrawal, Vishwani D. |
|
2013 |
29 |
6 |
p. 741-742 |
artikel |
4 |
Effective Timing Error Tolerance in Flip-Flop Based Core Designs
|
Valadimas, Stefanos |
|
2013 |
29 |
6 |
p. 795-804 |
artikel |
5 |
Efficient Test Compression Technique for SoC Based on Block Merging and Eight Coding
|
Wu, Tie-Bin |
|
2013 |
29 |
6 |
p. 849-859 |
artikel |
6 |
Low Cost Time Efficient Multi-tone Test Signal Generation Using OFDM Technique
|
Xia, Tian |
|
2013 |
29 |
6 |
p. 893-901 |
artikel |
7 |
MoDiVHA: A Hierarchical Strategy for Distributed Test Assignment
|
Koppe, Jefferson P. |
|
2013 |
29 |
6 |
p. 839-847 |
artikel |
8 |
Multi-bit Sigma-Delta TDC Architecture with Improved Linearity
|
Uemori, Satoshi |
|
2013 |
29 |
6 |
p. 879-892 |
artikel |
9 |
Online Testable Approaches in Reversible Logic
|
Nayeem, N. M. |
|
2013 |
29 |
6 |
p. 763-778 |
artikel |
10 |
Physics-Based Low-Cost Test Technique for High Voltage LDMOS
|
Kannan, Sukeshwar |
|
2013 |
29 |
6 |
p. 745-762 |
artikel |
11 |
Preserving Hamming Distance in Arithmetic and Logical Operations
|
Dolev, Shlomi |
|
2013 |
29 |
6 |
p. 903-907 |
artikel |
12 |
Selective SWIFT-R
|
Restrepo-Calle, Felipe |
|
2013 |
29 |
6 |
p. 825-838 |
artikel |
13 |
Survey and Evaluation of Automated Model Generation Techniques for High Level Modeling and High Level Fault Modeling
|
Xia, Likun |
|
2013 |
29 |
6 |
p. 861-877 |
artikel |
14 |
Test Technology Newsletter
|
|
|
2013 |
29 |
6 |
p. 743-744 |
artikel |